1. Field of the Invention
The present invention relates to a waveform synthesizing circuit. More specifically, the invention relates to a waveform synthesizing circuit to be employed in a transceiver or so forth for LAN (Local Area Network) for waveform shaping. Particularly, the invention relates to a waveform synthesizing circuit provided in parallel formation with a plurality of current switching circuits for outputting a predetermined magnitude of current when a voltage value reaches a preliminarily assigned comparing reference voltage, and output with superimposing currents output from a plurality of current switching circuits for summing.
2. Description of the Related Art
For establishing mutual communication between wordprocessors, personal computers or intelligent terminals installed within a relatively limited area, such as within a house or so forth, using a local area network system (LAN).
In FIG. 1, a basic construction of the Ethernet is illustrated as a typical example of a bus type LAN.
In FIG. 1, a coaxial cable 3 is used as a transmission cable. At both ends of the cable, 50 .OMEGA. of terminal resistors are provided for impedance matching. On the other hand, depending upon necessity, transceivers 2 are provided in the transmission path of the coaxial cable 3 for enabling communication with various terminals connected to the coaxial cable 3. To each transceiver 2, various terminals, such as a personal computer 6, a file server 5, printer 4 and so forth are connected, and mutual communication is performed between personal computers 6. Also, by the personal computers 6, the file server 5, the printer 4 or so forth are used in common. It should be noted that, in the case of Ethernet, a so-called CSMA/CD (carrier sense multiple access/collision detection) system is used to perform high speed communication with 50 ns or 100 ns of transmission pulse width employing a manchester code in the transmission signal.
For the circuit of the transceiver 2 connecting the terminal equipments 4 through 6 to the coaxial cable 3, the international standard IEEE 802.3 is applied to make the waveform of the pulse current waveform smooth by suppressing high harmonics so as to avoid noise on the transmission path and restrict degradation of the transmission waveform. In order to satisfy this requirement, a waveform synthesizing circuit is incorporated in the circuit of the transceiver 2.
One example of the conventional waveform synthesizing circuit is illustrated in FIG. 2. This circuit is provided with a plurality of current switching circuits (five, a through e in the shown embodiment) in parallel formation that output predetermined magnitudes of currents when the voltage value of an input pulse input to an input terminal (IN1) 11 reaches respective preliminarily assigned comparing reference voltages V.sub.ra through V.sub.re. The currents output from respective plurality of current switching circuits (a) through (e) are superimposed for summing, and the summed current is output from an output terminal OUT 12 as the output current. For example, the comparing reference voltages V.sub.ra through V.sub.re provided for respective plurality of current switching circuits (a) through (e) are determined by a predetermined current of a constant current circuit comprising a voltage control setting terminal (VCS) 19, a transistor 20 and a resistor 21, voltage drops at breeder resistors R1 through R5 by the predetermined current, and forward voltages between bases and emitters of the emitter follower transistors 13 to 17, which serve as low impedance buffers. As an example of an assignment of the comparing reference voltage V.sub.ra through V.sub.re, V.sub.re is a value V.sub.re =-5.95 V determined by the summing of voltage drops at the resistor R1 for the base-emitter forward voltage of the transistor 18 and the base-emitter forward voltage of the emitter follower 17 from the ground potential. For subsequent reference voltages, by summing respective voltage drops at respective resistors R2 to R5, the reference voltages become V.sub.rd =-6.0 V, V.sub.rc =-6.40 V, V.sub.rb =-6.56 and V.sub.ra =-6.70 V.
Operation in this case will be discussed with reference to the current switching circuit (e). When the pulse voltage input to the input terminal IN1 drops below the potential of V.sub.re =-5.95 V, an operational transistor 22 at IN1 side among operational transistors 22 and 23 of the current switching circuit e turns OFF, and the transistor 23, to which the V.sub.re is applied, turns ON to output (draw) current to the output terminal 12. Next, when the pulse voltage at the input IN1 reaches V.sub.rd =-6.08, then the current switching circuit d becomes active so that both currents of the current switching circuits (d) and (e) are superimposed for summing to be output. Similarly, the currents of respective current switching circuits (c) to (a) are summed so that a synthesized waveform, in which output transition waveforms are synthesized in a stepwise fashion, is output. Subsequently, while the input pulse voltage is rising, the output transition waveforms are synthesized in a stepwise fashion in opposite order. Accordingly, the synthesized waveform, in which the pulse transition waveform is dulled during an input pulse voltage transition period (for example, passing period of Vra through Vrd) passing through respective comparing reference voltages V.sub.ra through V.sub.re in order. This output pulse is smoothed for the stepwise transition component by a simple low pass filter at the next stage. Therefore, the pulse waveform having a smooth transition configuration at the leading and trailing edge can be obtained.
However, the above-mentioned waveform synthesizing circuit has the following problem.
FIG. 3 shows an output current in the case that the above-mentioned waveform synthesizing circuit is employed.
FIG. 3(A) shows a waveform of the input pulse (t) at the input terminal IN1, FIG. 3(C) shows an ideal output current waveform of the waveform synthesizing circuit relative to the input pulse. As shown in FIG. 3(C), the waveform required is a symmetric waveform with smooth transition portions.
However, in practice, the waveform output from the conventional waveform synthesizing circuit is as illustrated in FIG. 3(B). In the case of this waveform, variation immediately after the rising and falling is sharp and asymmetric between left and right. Therefore, it cannot be said that the output waveform is satisfactorily shaped, because of the wiring capacity on the circuit board or the LSI chip or the output impedance of the output terminal OUT 12. When an attempt is made to reduce current consumption and make the circuit into LSI, the above-mentioned waveform (FIG. 3(B)) becomes more remarkable. In this case, a high harmonic component forming the abruptly varying portion is included in the output waveform to easily generate high harmonic noise in the transmission path. Therefore, the signal waveform propagating through the transmission path can be substantially degraded.
Therefore, in view of the above-mentioned problem, it is an object of the present invention to provide a waveform synthesizing circuit that is unaffected by the capacity of wiring or so forth, satisfies the requirements for reduction of power consumption, and provides smooth output current waveform and a high harmonic component with reduced magnitude.